Analysis of scratches formed on oxide surface during chemical mechanical planarization

Title:
Analysis of scratches formed on oxide surface during chemical mechanical planarization
Creator:
Choi, Jae-Gon (Author)
Prasad, Y. Nagendra (Author)
Kim, In-Kwon (Author)
Kim, In-Gon (Author)
Kim, Woo-Jin (Author)
Busnaina, Ahmed A. (Author)
Park, Jin-Goo (Author)
Language:
English
Publisher:
The Electrochemical Society
Copyright date:
2009
Type of resource:
Text
Genre:
Articles
Format:
electronic
Digital origin:
born digital
Abstract/Description:
Scratch formation on patterned oxide wafers during the chemical mechanical planarization process was investigated. Silica and ceria slurries were used for polishing the experiments to observe the effect of abrasives on the scratch formation. Interlevel dielectric patterned wafers were used to study the scratch dimensions, and shallow trench isolation patterned wafers were used to study the effect of polishing parameters, such as pressure and rotational speed (head/platen). Similar shapes of scratches (chatter type) were observed with both types of slurries. The length of the scratch formed might be related to the period of contact between the wafer and the pad. Large particles would play a significant role in increasing the number of scratches. The probability of scratch generation is more at higher pressures due to higher friction force and removal rate. The optimization of the head to platen velocity could decrease the number of scratches.
Comments:
Originally published in the Journal of the Electrochemical Society, v.157 no.2 (2010), pp.H186-H191. DOI:10.1149/1.3265474
Subjects and keywords:
Integrated circuits - Wafer-scale integration
Chemical mechanical planarization
abrasives
cerium compounds
chemical mechanical polishing
friction
optimisation
planarisation
probability
silicon compounds
slurries
Electronic Devices and Semiconductor Manufacturing
Nanoscience and Nanotechnology

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